In integrated circuits, resistive random-access memory (RRAM) structures can be formed in the back end of the line between layers of interconnect structures (e.g., lines and vias) that include a metal (e.g., copper) or a metal alloy (e.g., copper alloy). Discontinuities (e.g., cracks) in the barrier layers of RRAMs can lead to copper loss from the interconnect structures and can have detrimental effects on die yield.